Research interests

My research interests are the further enhancement of the reconfigurable dataflow architecture, which I developed during my PhD thesis (see publications), and additionally the corresponding trend analysis of modern accelerator architectures:

Accelerator architectures

  • Dataflow architectures for high-performance DSP applications
  • Hardware design of multi-FPGA platforms
  • General-Purpose computing on Graphics Processing Units (GPGPU)
  • Reconfigurable High-Performance Computing (RHPC)

Moreover, my research interests are particularly in the following domains:

Modern (reconfigurable) multiprocessor architectures

  • reconfigurable Application-Specific Instruction-set Processor (rASIP)
  • System-on-a-Chip (SoC) Design

Embedded system design

  • Rapid-Prototyping for industrial applications
  • Energy-efficient product development by the Energy-using-Products (EuP) directive